1. Field of the Invention
This invention is related to the field of processors and, more particularly, efficient use and resource allocation for a queue.
2. Description of the Related Art
In a computing system, it is sometimes advantageous for multiple sources of transactions to share a common queuing structure which services those transactions. For example, in a distributed memory system a single “request queue” may be used to service requests directed to system memory from a CPU and from one or more I/O devices. For those devices which implement multiple CPU cores on a single chip, several CPU cores plus a chain of I/O devices may all share a single request queue. The request queue may generally be responsible for accepting an incoming memory request (e.g., a memory read or write), performing actions necessary for completing the request, and returning appropriate responses back to the requestors as necessary.
In large distributed memory multiprocessor systems, the actions necessary to complete memory requests may involve several steps. For example, actions which are necessary may include sending the request to a target, monitoring responses from other entities which may have a copy of the requested data and the response from memory, sending a “source done” indication when the operation is complete, and sending a response back to the requestor. Because the queue may also be required to handle cache block requests, writes, interrupts and system management requests, the complexity associated with the queue can be significant and each queue entry may require significant area to implement. Consequently, limiting the total number of queue entries may be required. With a limited number of queue entries available, an efficient method of allocating and managing the available queue resources is desired.